Tim Lühnen

Tim Lühnen

Wissenschaftlicher Mitarbeiter

Mail: tim.luehnen@tuhh.de
Telefon: +49 40 30601 6101
Adresse: Am Schwarzenberg 3 (E), 4.045
Personensuche: Zum Eintrag

Projects

Publications

2026

HPEC Conference
GCStack+ and GCScaler+: Closing the Calibration Gap in GPU Performance Modelling for Modern Microarchitectures

Tim Lühnen, Ulf Kulau, Devashree Tripathy, Sohan Lal2026 IEEE High Performance Extreme Computing Conference (HPEC)2026Accepted for publication.
tbd [BibTex]

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BibTex Entry

@inproceedings{luhnen2026hpec,
author = {L{ü}hnen, Tim and Kulau, Ulf and Tripathy, Devashree and Lal, Sohan},
booktitle = {2026 IEEE High Performance Extreme Computing Conference (HPEC)},
doi = {tbd},
entrysubtype = {Conference},
month = {September},
note = {Accepted for publication},
organization = {IEEE},
pages = {1–7},
title = {GCStack+ and GCScaler+: Closing the Calibration Gap in GPU Performance Modelling for Modern Microarchitectures},
year = {2026},
}

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PARMA-DITAM Conference
Accelerating GPGPU Simulation by Strategically Parallelizing the Compute Bottleneck

Jakob Sachs, Tim Lühnen, Sohan Lal17th Workshop on Parallel Programming and Run-Time Management Techniques for Many-Core Architectures and 15th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms (PARMA-DITAM 2026)Schloss Dagstuhl – Leibniz-Zentrum für Informatik2026.
10.4230/OASIcs.PARMA-DITAM.2026.6 [BibTex]

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BibTex Entry

@inproceedings{sachs2026,
location = {Dagstuhl, Germany},
author = {Sachs, Jakob and Lühnen, Tim and Lal, Sohan},
booktitle = {17th Workshop on Parallel Programming and Run-Time Management Techniques for Many-Core Architectures and 15th Workshop on Design Tools and Architectures for Multicore Embedded Computing Platforms (PARMA-DITAM 2026)},
doi = {10.4230/OASIcs.PARMA-DITAM.2026.6},
editor = {Baroffio, Davide and Busia, Paola and Denisov, Lev and Shukla, Nitin},
entrysubtype = {Conference},
isbn = {978-3-95977-416-1},
issn = {2190-6807},
months = {January},
pages = {6:1–6:13},
publisher = {Schloss Dagstuhl – Leibniz-Zentrum f{ü}r Informatik},
series = {Open Access Series in Informatics (OASIcs)},
title = {{Accelerating GPGPU Simulation by Strategically Parallelizing the Compute Bottleneck}},
url = {https://drops.dagstuhl.de/entities/document/10.4230/OASIcs.PARMA-DITAM.2026.6},
volume = {141},
year = {2026},
}

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2025

IISWC Conference
ClusterSim: Modeling Thread Block Clusters in Hopper GPUs

Tim Lühnen, Jyotirman Behera, Devashree Tripathy, Sohan Lal2025 IEEE International Symposium on Workload Characterization (IISWC)2025.
10.1109/IISWC66894.2025.00048 [BibTex]

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BibTex Entry

@inproceedings{luhnen2025clustersim,
author = {L{ü}hnen, Tim and Behera, Jyotirman and Tripathy, Devashree and Lal, Sohan},
booktitle = {2025 IEEE International Symposium on Workload Characterization (IISWC)},
doi = {10.1109/IISWC66894.2025.00048},
entrysubtype = {Conference},
organization = {IEEE},
pages = {504–515},
title = {ClusterSim: Modeling Thread Block Clusters in Hopper GPUs},
year = {2025},
}

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2024

HPEC Conference
Benchmarking thread block cluster

Tim Lühnen, Tobias Marschner, Sohan Lal2024 IEEE High Performance Extreme Computing Conference (HPEC)2024Best Paper Award.
10.1109/HPEC62836.2024.10938416 [BibTex]

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BibTex Entry

@inproceedings{luhnen2024benchmarking,
author = {L{ü}hnen, Tim and Marschner, Tobias and Lal, Sohan},
booktitle = {2024 IEEE High Performance Extreme Computing Conference (HPEC)},
doi = {10.1109/HPEC62836.2024.10938416},
entrysubtype = {Conference},
note = {Best Paper Award},
organization = {IEEE},
pages = {1–7},
title = {Benchmarking thread block cluster},
year = {2024},
}

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Student Theses

Open Theses Topics